Thanks for your ECEJ editorial about the Open Forum on 1 July.

You ask for suggestions of what would really make the day for me. So here goes!

What would make the day for me would be an opportunity to tell people about the IEEE 1355 standard for heterogeneous interconnect. Almost no-one at the Forum will have heard of it, and yet many there would be able to benefit from it.

1355 provides a serial communications interface, like a UART or serial port on a PC. Like the serial port, 1355 is asynchronous, autobaud, point-to-point, and very simple. Unlike the serial port it runs from about 1MBaud up to 200 or more MBaud, and protocol compatible versions are being developed up to 2GBaud.

For such a performance difference one might expect it to be more expensive than a serial port. Not so. Xilinx offer circuits for a 16550 UART with FIFOs at 350 Configurable Logic Blocks (CLBs), whereas the equivalent 1355 circuit fits in just 100 CLBs, and runs at 140MBaud.

So an individual link offers around 100 times the performance of a serial port at a third the logic cost of the serial port.

Of course nowadays we don't just connect one chip to one chip, or one box to one box, we build networks. Some of these networks, like USB and FireWire/1394 or old-style Ethernet, are logical buses. So the more nodes you add the slower they go, and they are prone to single-point failures.

More modern networks such as ATM, FibreChannel, switched Ethernet, and 1355 are designed for switched networks. The two great advantages of switched networks over the buses are that the overall bandwidth grows as the network grows, and redundant paths can be used both to relieve bottlenecks and to provide fault-tolerance.

Two aspects of 1355 make it particularly suitable for switched networks. One is the very small amount of logic needed for each port, which makes it possible to put many ports on a single chip, or to make three or four port *switches* with less logic than a USB or FireWire *hub*. The other is 1355's built-in flow-control mechanism, which prevents buffer overflow and so the switches do not need huge buffers.

In a way, the low cost of the 1355 switches provide a packet switch much closer to the cost of a circuit switch. And indeed the flexible packet length means the switches can provide a continuum between circuit switching (with very long packets) and cell switching (with cells as short as two or three bytes).

The minimalist packet protocol of 1355 makes it particularly easy to embed other protocols within it. So, for example, the same network can be carrying ATM and MPEG and IP and raw disk sectors and even memory accesses, and all with negligible additional protocol overhead.

So if it is all so wonderful, what are the negatives? One is that it has been adopted by the Space industry, so the current chips are designed for RAD-Hard processes and consequently expensive. Two is that the standard is derived from transputer links, and transputers are seen as having failed (even if the rest of the world has decided that computing and communications are converging, and the transputer converged them 15 years ago). Third is that the original manufacturer withdrew the chips as soon as the about 50 MECU of EEC funding dried up. Fourth is that without the funding it has not been easy for those working with the standard. So there are not as many products --- either hardware or software --- as we would like and as the markets really need.

But much the biggest negative is that no one has ever heard of 1355.

If you could find a slot for me to tell people about 1355 at the Open Forum, you would, indeed, "make my day". And quite a few people who attend might be rather glad to have heard that such a combination of performance/cost/reliability/resilience/flexibility/scalability is not only possible but available.

Thanks again for asking!